This describes the architecture of voltage level shifter and an application of voltage level shifter. Voltage level shifter plays an important role in circuits with multi- supply . Level shifter are used in between blocks for voltage level shifting. The proposed level shifter converts sub-threshold voltage level to supply voltage with increased speed and low power consumption . The multi-threshold voltage CMOS technique is used in the design of voltage level shifter in order to reduce delay and power consumption. This design has been implemented in 180nm, 90nm and 45nm technologies in Cadence virtuoso. The propagation delay, power consumption is verified.