International Journal of Scientific and Research Publications

IJSRP, Volume 3, Issue 12, December 2013 Edition [ISSN 2250-3153]

Designing of Efficient iSLIP Arbiter using iSLIP Scheduling Algorithm for NoC
      Deepali Mahobiya
Abstract: Arbiters are a fundamental component in systems containing shared resources, and a centralized arbiter is a tightly integrated design for its input requests. In this study, we propose a new centralized arbiter, which may be used in arbitration of a crossbar switch in NoC routers. As fabrication technology continues to improve, smaller feature sizes allow increasingly more integration of system components onto a single die. Communication between these components can become the limiting factor for performance unless embodying the correct scheduling algorithm. In this paper, we design iSLIP arbiter using iSLIP scheduling algorithm with mesh router for NoC. An iterative, round-robin algorithm, iSLIP can achieve 100% throughput for uniform traffic, yet is simple to implement in hardware. Prototype and commercial implementations of iSLIP exist in systems with aggregate bandwidths ranging from 50 to 500 Gb/s. When the traffic is nonuniform, iSLIP quickly adapts to a fair scheduling policy that is guaranteed never to starve an input queue. This new arbiter is fair for any input combinations and faster & it is designed using ModelSimSE 6.3f for simulation of code and xilinx for synthesis.

Reference this Research Paper (copy & paste below code):

Deepali Mahobiya (2018); Designing of Efficient iSLIP Arbiter using iSLIP Scheduling Algorithm for NoC ; Int J Sci Res Publ 3(12) (ISSN: 2250-3153).
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