Abstract: As silicon technology scales, modern processors and embedded systems are rapidly shifting towards complex chip multi-processor (CMP) and system-on-chip (SOC) designs, comprising several processor cores and IP components communicating via a network-on- chip (NOC). As a side-effect of this trend, ensuring their correctness has become increasingly problematic. In particular, the network- on-chip often includes complex features and components to support the required communication bandwidth among the nodes in the system.