IJSRP, Volume 2, Issue 10, October 2012 Edition [ISSN 2250-3153]
K.B.R.G.T. Samarasinghe, M.M.N.N. Jayasekara , D. Elkaduwe , R. G. Ragel
The ability to reduce power consumption of a device is attractive for several reasons. On one hand, reducing power in high end computers will reduce the cost of cooling and the performance loss due to overheating cores. On the other hand, ubiquitous battery powered devices will enjoy a longer battery life due to the reduction in power consumption. In this paper, we present a set of mechanisms that uses instruction scheduling to reduce the power consumption of RISC like microcontrollers that are common in battery powered devices. Initially, we devised a method to measure the approximate power consumption of each basic assembly instruction of the microcontroller. By a statistical analysis of the power measurement, we categorized the basic instructions into groups. Our measurements demonstrate that some instruction combinations consume more power than others which will perform the same functional operations. We leveraged this observation to rearrange the scheduling of basic machine instructions of a high level programming language, such that the final program is optimized for power. Some of our test cases demonstrate significant reduction in power consumption without any performance degradation. The resultant ideas can therefore be used by both system programmers and compiler designers.