International Journal of Scientific and Research Publications

IJSRP, Volume 4, Issue 5, May 2014 Edition [ISSN 2250-3153]


Dual Redundancy CAN-bus Controller based on FPGA
      Deepika.T.P., Bhagya.P
Abstract: In the present trend, CAN buses are implemented using software with the host computer monitoring the CAN as slave. Cause of which leads to bad reliability and real time performance. According to CAN specification version 2.0 of BOSCH gmbh, by downloading the IPcore to XILINXs Spartan 6 FPGA, hardware implementation of customized Dual redundancy CAN bus Controller is put forward in this Paper. It is verified that proposed design can meet the required real-time performance and reliability.

Reference this Research Paper (copy & paste below code):

Deepika.T.P., Bhagya.P (2018); Dual Redundancy CAN-bus Controller based on FPGA; Int J Sci Res Publ 4(5) (ISSN: 2250-3153). http://www.ijsrp.org/research-paper-0514.php?rp=P292630
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