International Journal of Scientific and Research Publications

IJSRP, Volume 4, Issue 12, December 2014 Edition [ISSN 2250-3153]


FPGA based hardware as a coprocessor
      G.Prasad, N.Vasantha
Abstract: The process of hardware – software co-design of satellite data acquisition system is described. The hardware components are targeted to execute on a reconfigurable hardware coprocessor which communicates with a host computer that executes the software tasks. Control of the data flow between device interfaces, processing blocks and memories in a data acquisition system is complex in hardware implementation.. With growing computational needs, high design and NRE costs of ASICs, FPGA based co-processor has become a viable alternative. The main objective of our co-design methodology is the usage of hardware designing of algorithms, simulation and synthesis.

Reference this Research Paper (copy & paste below code):

G.Prasad, N.Vasantha (2018); FPGA based hardware as a coprocessor; Int J Sci Res Publ 4(12) (ISSN: 2250-3153). http://www.ijsrp.org/research-paper-1214.php?rp=P363473
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