International Journal of Scientific and Research Publications

IJSRP, Volume 3, Issue 11, November 2013 Edition [ISSN 2250-3153]


Design and Implementation of Optimized Dual Port Register File Bit Cell
      Prashanth Sai Manohara.S., A.B.Kalpana
Abstract: The memory bit cell is the most important block of any memory. It defines memory specifications and occupies a major portion of the area in any memory. Power performance & Area (PPA) are industry wide parameters which are used to evaluate a memory configuration. Larger the memory size larger is its power consumption. But designing the memory bit cell effectively minimizes the area consumption of the memory and the chip.

Reference this Research Paper (copy & paste below code):

Prashanth Sai Manohara.S., A.B.Kalpana (2018); Design and Implementation of Optimized Dual Port Register File Bit Cell; Int J Sci Res Publ 3(11) (ISSN: 2250-3153). http://www.ijsrp.org/research-paper-1113.php?rp=P232021
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