International Journal of Scientific and Research Publications

IJSRP, Volume 9, Issue 4, April 2019 Edition [ISSN 2250-3153]


Analysis and Synthesis of Elevator Controller Based On VHSIC Hardware Description Language
      Ei Phyu Soe, Dr.Myint Myint Soe, Htet Htet Yi
Abstract: This paper presents a simple design and implementation of an elevator controller based on Very High-Speed Integrated Circuits Description Language (VHDL). The controller is implemented in a FPGA using Altera Quartus II software package verision 9.0 (Web Edition). The Altera Quartus II software package is an integrated development environment (IDE) supplied by Altera for the creation of HDL applications. This controller can be implemented for an elevator with the required number of floors by simply changing a control variable in the VHDL code. In the proposed design a VHDL code is developed to control the lift moment based on the request it will get. The design is based on the synchronous input which should be operating with a fixed sort of frequency. Finally the RTL(register transfer level) is verified and implemented in Precision Synthesis Tool. In this paper, the five-floor controller will be modelled with VHDL code using QII software.

Reference this Research Paper (copy & paste below code):

Ei Phyu Soe, Dr.Myint Myint Soe, Htet Htet Yi (2019); Analysis and Synthesis of Elevator Controller Based On VHSIC Hardware Description Language; International Journal of Scientific and Research Publications (IJSRP) 9(4) (ISSN: 2250-3153), DOI: http://dx.doi.org/10.29322/IJSRP.9.04.2019.p8806
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