International Journal of Scientific and Research Publications

IJSRP, Volume 3, Issue 4, April 2013 Edition [ISSN 2250-3153]


Reduction of Delay Propagation in Parallel Architecture Based on FNT for High Speed Cyclic Convolution
      M.Vyshnava Datta, Ankit Kumar Jain
Abstract: This project deals with a cyclic convolution of high speed parallel architecture based on Fermat number transform (FNT). Cyclic convolution architectures are implemented for operands in diminished-1 representation. The code conversion (CC) method is mandatory to convert normal binary numbers into their diminished-1 representation. In this paper we discuss about the FNT (Fermat Number Transform) and IFNT (Inverse Fermat Number Transform) operations which are performed by CCWA (Code Conversion without Addition) & BOWA (Butterfly Operation without Addition). The convolution which is the point wise multiplication is implemented by modulo 2n+1 partial product multipliers (MPPM) and these output partial products are the inputs to the IFNT and modulo 2n+1 carry propagation additions are avoided in the FNT and the IFNT except in their final stages The reduction of modulo 2n+1 carry propagation addition reduces the execution delay of the parallel architecture. The proposed one has better throughput performance and involves less hardware complexity than the existing cyclic convolution architecture.

Reference this Research Paper (copy & paste below code):

M.Vyshnava Datta, Ankit Kumar Jain (2018); Reduction of Delay Propagation in Parallel Architecture Based on FNT for High Speed Cyclic Convolution; Int J Sci Res Publ 3(4) (ISSN: 2250-3153). http://www.ijsrp.org/research-paper-0413.php?rp=P161035
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