IJSRP, Volume 4, Issue 5, May 2014 Edition [ISSN 2250-3153]
Neha Goyal, Khushboo Gupta, Renu Singla
Low power consumption and smaller area are some of the most important criteria for the fabrication of DSP systems and high performance systems. Optimizing the speed and area of the multiplier is a major design issue. However, area and speed are usually conflicting constraints so that improving speed results mostly in larger areas. In our project we try to determine the best solution to this problem by comparing a few multipliers.