International Journal of Scientific and Research Publications

IJSRP, Volume 3, Issue 4, April 2013 Edition [ISSN 2250-3153]


A 16-bit MIPS Based Instruction Set Architecture for RISC Processor
      Sagar Bhavsar , Akhil Rao , Abhishek Sen , Rohan Joshi
Abstract: Microcontrollers and microprocessors are finding their way into almost every field in today’s world, incorporating an element of ‘smartness’ into conventional devices. Energy efficient, space efficient and optimized microcontrollers are the need of the day. Our paper proposes a new Instruction Set that is a subset of the MIPS architecture. It derives the advantages of MIPS like simplicity and speed. Besides, since it is a smartly optimized subset of MIPS, it is a smaller version consisting of the most commonly required instructions.

Reference this Research Paper (copy & paste below code):

Sagar Bhavsar , Akhil Rao , Abhishek Sen , Rohan Joshi (2018); A 16-bit MIPS Based Instruction Set Architecture for RISC Processor ; Int J Sci Res Publ 3(4) (ISSN: 2250-3153). http://www.ijsrp.org/research-paper-0413.php?rp=P161112
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