Abstract: This paper presents a low power design methodology for the Quasi Resonant Interconnection networks (QRN). This focuses mainly on reducing the power utilized at the receiver by replacing the existing delay element by a digitally controlled delay element. The analysis and design of the transmitter, receiver and the Interconnect and spiral inductor models are presented using 0.18µm CMOS technology. A very efficient reduction in power can be obtained by this method as about 0.12W is the power at the proposed receiver when compared to 50W in the existing receiver.